Riverlane unveils microsecond quantum error decoder

Riverlane has reported peer-reviewed results for its Local Clustering Decoder, a hardware-based quantum error correction decoder that runs in real time and targets the dominant "surface code" architecture used in many quantum computers.

The work, published in the journal Nature Communications, describes a decoder chip that executes a decoding round in just under a microsecond. The company said the design achieves this speed while maintaining high accuracy and adaptive behaviour as noise conditions change in a quantum processor.

Quantum error correction has become a central challenge as hardware developers increase qubit counts. Qubits are highly sensitive to noise and drift, which introduces frequent errors into quantum computations. Conventional supercomputers do not face the same level of instability, and researchers see robust error correction as a prerequisite for large-scale, fault-tolerant quantum machines.

Error correction schemes for quantum devices rely on classical decoders, which process streams of error signals, or "syndromes", generated by the qubits. These decoders must interpret the syndromes and recommend corrections before errors spread through the system and render calculations unreliable.

Developers have struggled with trade-offs in this decoding step. Algorithms that run fast often sacrifice accuracy. More accurate methods tend to be too slow or too resource-intensive. Many approaches also do not scale well with the rapidly increasing volume of error data from larger quantum processors.

Riverlane said its Local Clustering Decoder addresses this bottleneck by adapting its behaviour to the specific characteristics of each quantum computer. The decoder runs on field-programmable gate array (FPGA) hardware. The company said this supports real-time operation on current devices and leaves room for modification as systems evolve.

"The core challenge in quantum error correction has always been achieving real-time speed without compromising accuracy," said Neil Gillespie, VP of Applied Research at Riverlane. "With the Local Clustering Decoder, we've shown that you can deliver both in hardware, with adaptive performance that keeps pace with today and tomorrow's quantum computers."

Clustering approach

The Local Clustering Decoder groups nearby qubit errors into clusters. It then resolves those clusters in parallel. This separation into many smaller local problems aligns with the parallel structure of bespoke reprogrammable FPGA chips.

This parallelism allows the decoder to handle large volumes of quantum error data at microsecond timescales. Riverlane said the implementation delivers one decoding round in under a microsecond in hardware tests.

The company highlighted the adaptive features of the design. As a quantum processor runs, the decoder updates its internal model of the noise environment. It looks for patterns such as correlated errors that involve multiple qubits at once.

One focus is a noise source known as leakage. Leakage occurs when qubits stray into higher energy levels outside the intended two-level computational basis. This drift can corrupt stored quantum information. The decoder's adaptive model includes mechanisms that respond to such effects as they appear.

Riverlane compares this behaviour to a navigation system that continually recalculates routes as conditions change. The company said this continuous updating supports stable accuracy even as hardware characteristics fluctuate during extended runs.

According to the publication, the combination of local clustering and continual model updates underpins the reported balance of speed and accuracy. The approach is designed for use with the surface code, a leading error correction code that arranges qubits in a two-dimensional grid and underpins many current quantum hardware roadmaps.

Product integration

The technology described in the paper now forms the core of Riverlane's Deltaflow software and hardware stack, which targets real-time quantum error correction. The latest release, Deltaflow 2, incorporates the Local Clustering Decoder in a form that integrates with existing control systems.

Riverlane said Deltaflow 2 has already been deployed on multiple quantum computing platforms. Named users include Infleqtion, Oxford Quantum Circuits, Oak Ridge National Labouratory and Rigetti Computing. These deployments span different qubit modalities and control systems.

The company said these projects show that the decoder can scale across various hardware platforms and quantum processing units. The same core decoder design runs across these different implementations.

Riverlane also offers access to the decoder through Deltakit, its software package for learning about and experimenting with quantum error correction. Deltakit runs in a software environment rather than on dedicated decoder hardware.

Roadmap and scale

Riverlane is developing a roadmap that targets continuous, real-time quantum error correction. Researchers regard continuous correction during computation as a key requirement for fault-tolerant quantum computers that can run long algorithms on logical qubits.

The company said its next major release, Deltaflow 3, is expected in late 2026. The planned version will introduce a feature called "streaming logic". Riverlane said this will support continuous detection and correction of errors while a quantum computer executes operations on logical qubits, rather than in discrete cycles separated from computation.

Each generation of the Deltaflow stack is being designed with the constraints of large-scale error correction in mind. Riverlane cites speed, accuracy, adaptivity and system-level integration as central design criteria.

The company links this roadmap with longer-term targets for "utility-scale" quantum computing. Researchers use the term utility-scale to describe quantum systems that can run practical, error-corrected applications that outperform any classical machine on specific tasks.

Riverlane positions the Local Clustering Decoder as one step on this path. The firm said it expects future systems to require quantum processors that can sustain millions or billions of operations without failure.

"We have shown that real-time error correction is possible," said Steve Brierley, Founder & CEO of Riverlane. "Our focus is on scaling this capability and delivering the QEC technologies that will enable every quantum computer to reach utility-scale."